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The 80x87 is able to multiply, divide, add, subtract, find the sqrt and calculate transcendental functions and logarithms.
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Data types include 16-, 32- and 64-bit signed integers; 18-digit BCD data; and 32-, 64- and 80-bit (extended precision) floating-point numbers.
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The directives
dw
,
dd
and
dq
are used for declaring signed integer storage while
dd
,
dq
and
dt
are used for floating-point.
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Converting from
decimal
to
floating-point
is accomplished:
-
Convert the decimal number into binary.
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Normalize the binary number.
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Calculate the biased exponent.
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Store the number in the floating-point format.
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Bias is 0x7F, 0x3FF and 0x3FFF for the 3 floating-point number types.
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Special Rules:
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The number 0 is stored as all 0s (except for the sign bit).
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+/- infinity is stored as logic 1s in the exponent, with a significand of all 0s. Sign bit is used to represent +/- infinity.
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A NAN (not-a-number) is an invalid floating-point result that has all 1s in the exponent with a significand that is NOT all zeros.
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Converting from
floating-point
to
decimal
is accomplished:
-
Separate the sign-bit, biased exponent, and significand.
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Convert the biased exponent into a true exponent by subtracting the bias.
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Write the number as a normalized binary number.
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Convert it to a de-normalized binary number.
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Convert the de-normalized binary number to decimal.
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The 80x87 executes 68 different instructions.
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Basic structure of the co-processor.
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The registers in the coprocessor stack always contain 80-bit extended precision data.
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Memory data, of course, can assume other representations. Therefore, conversions occur during transfers.
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FSTSW
AX (Floating-point STore Status Word).
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An instruction that transfers data between the coprocessor and the AX register.
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Error conditions can be checked in your program by examining bits of this status word.
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You can use the TEST instruction to test bits or the SAHF instruction to transfer the left-most 8 bits to the EFLAGs register.
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This register selects precision, rounding control and infinity control.
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For example, a value of 00 for P and C sets single precision mode.
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R and C control rounding, e.g. round down, up or truncate toward 0.
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Data Transfer Instructions:
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FLD (Load Real)
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Loads floating-point data to Stack Top (ST). Stack pointer is then decremented by 1.
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Data can be retrieved from memory, or another stack position.
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Note that ST is register 0 after initialization.
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FST (Store Real), FSTP (Store Real and Pop)
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Stores a copy of the top of the stack (and pop for FSTP) into memory or another coprocessor register.
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Rounding occurs when the storage operation completes according to the control register.
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FXCH (Exchange)
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Exchanges register given as operand with ST.
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FCMOV (Conditional floating point MOV)
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Integer Data Transfer Instructions:
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FILD (load integer)
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FIST (Store integer)
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FISTP (Store integer and pop)
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Similar to FLD, FST and FSTP except they transfer (and convert) integer.
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Stack addressing mode is restricted to use ST (stack top) and ST1.
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The source operand is ST while the destination operand is ST1.
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After the operation, the source is popped, leaving the dest. at ST.
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Arithmetic Instructions (cont):
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Note that FSUB subtracts ST from ST1, e.g., ST = ST1 - ST.
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Use FSUBR to reverse the order.
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For example, to compute the reciprocal (1/X):
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Register addressing mode MUST use ST as one of the operands.
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The other operand can be any register, including ST0 which is ST.
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Note that the destination can be either ST or STn.
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Also, unlike stack addressing, non-popping versions can be used.
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Memory addressing mode always uses ST as the destination.
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Arithmetic Instructions (cont):
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The following letters are used to additionally qualify the operation:
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P: Perform a register pop after the operation, FADD and FADDP.
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R: Reverse mode for subtraction and division.
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I: Indicates that the memory operand is an integer. I appears as the second letter in the instruction, e.g., FIADD, FISUB, FIMUL, FIDIV.
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Arithmetic Related Instructions:
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FSQRT: Finds the square root of operand at ST. Leave result there. Check IE bit for an invalid result, e.g., the operand was negative using FSTSW AX, and TEST AX, 1.
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FSCALE: Adds contents of ST1 (interpreted as an integer) to the exponent of ST.
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FPREM1: Performs modulo division of ST by ST1. The resultant remainder is found at ST.
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FRNDINT: Rounds ST to an integer.
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Arithmetic Related Instructions (cont):
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FXTRACT: Decomposes ST into an unbiased exponent and a significand. Extracted significand is at ST and unbiased exponent at ST1.
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FABS: Change sign of ST to positive.
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FCHS: Invert sign of ST.
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Comparison Instructions:
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These instructions examine ST in relation to another element and return result of the comparison in the status register bits C3-C0.
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FCOM: Compares ST with an memory or register operand. FCOM by itself compares ST and ST1.
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FCOMP/FCOMPP: Compare and pop once or twice.
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FICOM/FICOMP: Compare ST with integer memory operand and optionally pop the stack.
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FTST: Compare ST with 0.0.
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FXAM: Exam ST and modify CC bits to indicate whether contents are positive, negative, normalized, etc. (See text).
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FCOMI/FUCOMI: Combines FCOM, FNSTSW AX, and SAHF.
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Transcendental Operations: (See text for semantics).
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FPTAN
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FPATAN
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F2XM1: Compute 2x -1
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FSIN/FCOS
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FSINCOS
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FYL2X: Compute Ylog2X
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FYL2XP1: Compute Ylog2(X + 1)
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Constant Returning Operations:
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FLDZ: Store +0.0 to ST.
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FLD1: Store +1.0 to ST.
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FLDPI: Store pi to ST.
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FLDL2T: Store log210 to ST.
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FLDL2E: Store log2e to ST.
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FLDLG2: Store log102 to ST.
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FLDLN2: Store loge2 to ST.
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Coprocessor Control Instructions:
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FINIT/FNINIT: Reset coprocessor with or without waiting afterwards.
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FWAIT: Stops microprocessor until coprocessor has finished an operation. Should be used before the microprocessor accesses memory data that are affected by the coprocessor.
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Instruction reference is given in text along with examples.