ADVANCED COMPUTER ARCHITECTURE

Revised 2/26/99

DLX attributes that are required. See section 2.8 of text. If any
details are omitted below, they can be found in the text.

GENERAL:
   32 general purpose registers, R0,.. R31. R0 is always 0.
      Optionally: 32 floating point registers F0,... F31
   Data types: 8-bit, 16-bit and 32-bit integers.
      Optionally: 32-bit and 64-bit floating point.
   Address modes: immediate and displacement. Register deferred and
      Absolute possible as well, see text.
   DLX memory is byte addressable in Big Endian mode with a 32-bit 
      address.
   Fixed instruction encoding, opcode is 6 bit with addressing mode
      encoded. See instruction formats on page 99 of text.
   Operations: See page 104. All operations except those operating
      on floating point or special registers are required. Any
      implemention that includes a subset of the floating point 
      operations (i.e. MULT and DIV) will get bonus points !


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