Overview

• Taxonomy of Instruction Set Architectures (ISA).
• Summarize results of instruction set measurements.
• Language and Compilers and their influence on ISAs.

 

• Taxonomy of ISAs :
• Stack Architecture :
• Operands are implicitly on the top of the stack.

 

• Accumulator :
• One operand is implicitly in accumulator.

Taxonomy of ISAs

• General Purpose Register (GPR) architecture: Three general types:
• Memory-memory :
• May have 2 or 3 operands in memory (VAX).
• Register-memory:
• Operations occur between register and memory (one operand in memory).
• Usually 2 operands, one in a register (src and dest) and one in memory (src only).
• Load-store :
• Data must be explicitly moved between registers and memory.
• ALU operations use register operands only.
• Usually 3 operands, all in registers.

Taxonomy of ISAs

 

• Why are GPR ISAs so popular ?

 

• Registers are faster than memory (4ns vs. 70ns).
• Compiler can use them effectively to:
• Evaluate expressions
• Hold variables
• Pass parameters

 

• Two instruction set characteristics divide GPRs:
• The number of ALU operands (2 or 3.)
• The number of operands that may be memory addresses (0-3.)

ISA Metrics

• Instruction density :
• How much space does a program require ?
• Mem-mem and Reg-mem: good instruction density.

 

• Instruction count :
• How many instructions are necessary for a specific task ?
• Reg-reg usually have large instruction counts compared to Mem-mem and Reg-mem.

 

• Instruction complexity :
• How much decoding is necessary to interpret an instruction ?
• Mem-mem most complex, Reg-reg simplest.

 

• Instruction length :
• Is length dependent on the type of instruction and addressing mode ?
• Mem-mem instruction length can be variable and usually longer than Reg-reg due to memory operands.
• Reg-reg instructions are usually (always) fixed in length.

Memory addressing

• How is a memory address interpreted ?

 

• What byte is specified by the address ?
• Two conventions for byte ordering:
• Big Endian : The address of the "word" is the address of the most significant (biggest) byte.
• Little Endian : The address of the "word" is the address of the least significant (littlest) byte.

 

• Problem: When word (binary) data is transferred between the two types of machines, byte swapping is necessary.

 

• Alignment
• On many machines, accesses to objects larger than a byte must be aligned. i.e.
• A 4-byte integer must be stored at an address divisible by 4 for word alignment.
• Why ?
• Misalignment complicates the hardware.

Addressing Modes

• An addressing mode can specify a constant, a register or a location in memory.

 

• Register : Operand is in a register.
• Add R4, R1

 

• Immediate : Operand is a constant encoded directly in the instruction.
• Add R4, #10

 

• Displacement : Memory address is computed by adding a constant (found in the instruction) to the value in the register.
• Add R4, 100(R1)

 

• Indirect : Similar to displacement except the constant is 0.
• Add R4, (R1)

 

• Indexed : Two registers are added together to get the memory address.
• Add R3, (R1 + R2)

Addressing Modes

 

• Direct/Absolute : The memory address is contained directly in the instruction.
• Add R1, (1001)

 

• Auto-increment/decrement : The value in a register is either incremented/decremented, either before or after the register's value is used as a memory address.
• Add R1, (R2)+
• Add R1, -(R2)

 

• Scaling : Similar to indexed except that the index value may be implicitly multiplied by a constant (2, 4 or 8) in order to access halfwords, words or doublewords. Also, it contains an explicit constant.
• Add R1, 100(R2)[R3]

 

• Memory deferred : Allows additional levels of indirection.
• Add R1, @(R3)

Addressing Modes

• We skipped PC-relative addressing modes for the moment.
• These specify code addresses in control transfer instructions.

 

• Addressing mode impact:
• Can significantly reduce instruction count.
• Add complexity to the hardware.
• May increase average CPI.

Addressing Modes

• Important addressing modes:
• Register : Provides the means to use the registers.

 

• Displacement : Provides the means of implementing pointers
• Add R4, 100(R1) where R1 holds the address of a data item.

 

• Issue: What is the appropriate displacement field size ?
• Important because it affects instruction length.

 

• Program analysis shows that:
• 12 bits capture ~75% of full 32-bit displacements found in programs.
• 16 bits capture ~99% of full 32-bit displacements found in programs.

 

• Therefore, 12-16 bits is probably sufficient.

Addressing Modes

• Important addressing modes:
• Immediate : Used in arithmetic operations (comparisons) and in moves where a constant is needed in a register.

 

• Issue: What is the appropriate immediate field size ?
• Important because it affects instruction length.

 

• Program analysis shows that:
• Most immediate values are less than 8 bits (50%-70% on the VAX).
• However, large immediates are sometimes used, most often in address calculations.
• Therefore, 8-16 bits is probably sufficient.

 

• Integer programs use immediates quite often (up to 1/3 of all instructions) while floating point programs use them less often (1/10).

 

• Other addressing modes are certainly useful, but are they worth the chip space and design complexity ?