SET_PARAMETER pll_clkout3_divide 1 SET_PARAMETER clkout2_requested_out_freq 75.000 SET_PARAMETER mmcm_clkout6_use_fine_ps false SET_PARAMETER mmcm_clock_hold false SET_PARAMETER psen_port PSEN SET_PARAMETER clkout4_drives BUFG SET_PARAMETER dcm_clkgen_clkfx_divide 1 SET_PARAMETER dcm_clkgen_clkin_period 10.000 SET_PARAMETER clk_out7_use_fine_ps_gui false SET_PARAMETER mmcm_clkout5_divide 1 SET_PARAMETER locked_port LOCKED SET_PARAMETER use_status false SET_PARAMETER mmcm_clkout2_duty_cycle 0.500 SET_PARAMETER clk_in_sel_port CLK_IN_SEL SET_PARAMETER ss_mod_freq 250 SET_PARAMETER dcm_clkgen_clk_out1_port CLKFX SET_PARAMETER clkout4_requested_phase 0.000 SET_PARAMETER override_dcm false SET_PARAMETER summary_strings empty SET_PARAMETER use_freq_synth true SET_PARAMETER prim_in_jitter 0.010 SET_PARAMETER clkout7_requested_duty_cycle 50.000 SET_PARAMETER dcm_clkgen_clkfx_multiply 4 SET_PARAMETER mmcm_clkout5_phase 0.000 SET_PARAMETER clk_out3_use_fine_ps_gui false SET_PARAMETER secondary_source Single_ended_clock_capable_pin SET_PARAMETER clkfb_stopped_port CLKFB_STOPPED SET_PARAMETER dcm_clkgen_startup_wait false SET_PARAMETER clkout1_requested_out_freq 75.000 SET_PARAMETER dcm_clkgen_clk_out2_port CLKFX SET_PARAMETER input_clk_stopped_port INPUT_CLK_STOPPED SET_PARAMETER pll_clkout0_duty_cycle 0.500 SET_PARAMETER mmcm_bandwidth OPTIMIZED SET_PARAMETER mmcm_clkin1_period 10.000 SET_PARAMETER override_mmcm false SET_PARAMETER mmcm_clkout5_use_fine_ps false SET_PARAMETER pll_clkout1_phase 0.000 SET_PARAMETER dcm_clkgen_clk_out3_port CLKFX SET_PARAMETER pll_clkout2_divide 1 SET_PARAMETER use_min_power false SET_PARAMETER feedback_source FDBK_AUTO SET_PARAMETER dcm_clkgen_clkfx_md_max 0.000 SET_PARAMETER prim_in_freq 100.000 SET_PARAMETER clkout3_drives BUFG SET_PARAMETER pll_clkfbout_mult 4 SET_PARAMETER mmcm_clkout4_divide 1 SET_PARAMETER mmcm_divclk_divide 4 SET_PARAMETER clkfb_out_n_port CLKFB_OUT_N SET_PARAMETER dcm_phase_shift 0 SET_PARAMETER psincdec_port PSINCDEC SET_PARAMETER mmcm_clkout3_duty_cycle 0.500 SET_PARAMETER mmcm_compensation ZHOLD SET_PARAMETER drdy_port DRDY SET_PARAMETER pll_clkfbout_phase 0.000 SET_PARAMETER mmcm_clkout0_phase 0.000 SET_PARAMETER mmcm_clkout6_phase 0.000 SET_PARAMETER dcm_notes None SET_PARAMETER use_dyn_phase_shift true SET_PARAMETER din_port DIN SET_PARAMETER mmcm_clkout4_use_fine_ps false SET_PARAMETER pll_clkout1_duty_cycle 0.500 SET_PARAMETER clkfb_out_p_port CLKFB_OUT_P SET_PARAMETER clkfb_in_port CLKFB_IN SET_PARAMETER pll_clkout2_phase 0.000 SET_PARAMETER clkin2_ui_jitter 0.010 SET_PARAMETER dwe_port DWE SET_PARAMETER pll_clkout1_divide 1 SET_PARAMETER clkout5_requested_phase 0.000 SET_PARAMETER clk_out4_use_fine_ps_gui false SET_PARAMETER use_power_down false SET_PARAMETER clkout2_drives BUFG SET_PARAMETER override_dcm_clkgen false SET_PARAMETER use_spread_spectrum_1 false SET_PARAMETER mmcm_ref_jitter1 0.010 SET_PARAMETER mmcm_ref_jitter2 0.010 SET_PARAMETER reset_port RESET SET_PARAMETER clkout1_requested_phase 0.000 SET_PARAMETER use_min_o_jitter false SET_PARAMETER secondary_port CLK_IN2 SET_PARAMETER mmcm_clkout3_divide 1 SET_PARAMETER ss_mode CENTER_HIGH SET_PARAMETER psdone_port PSDONE SET_PARAMETER clkfb_in_signaling SINGLE SET_PARAMETER dcm_clk_out1_port CLK0 SET_PARAMETER mmcm_clkout4_duty_cycle 0.500 SET_PARAMETER dout_port DOUT SET_PARAMETER clkout7_requested_out_freq 100.000 SET_PARAMETER mmcm_clkout3_use_fine_ps false SET_PARAMETER mmcm_clkout1_phase 0.000 SET_PARAMETER use_phase_alignment true SET_PARAMETER dcm_clk_out2_port CLK0 SET_PARAMETER secondary_in_jitter 0.010 SET_PARAMETER clkout1_requested_duty_cycle 50.000 SET_PARAMETER dcm_clkgen_clkfxdv_divide 2 SET_PARAMETER pll_clkout2_duty_cycle 0.500 SET_PARAMETER dcm_clk_out3_port CLK0 SET_PARAMETER use_spread_spectrum false SET_PARAMETER daddr_port DADDR SET_PARAMETER power_down_port POWER_DOWN SET_PARAMETER use_reset true SET_PARAMETER pll_clkout3_phase 0.000 SET_PARAMETER clkfb_out_port CLKFB_OUT SET_PARAMETER clk_valid_port CLK_VALID SET_PARAMETER pll_clkout0_divide 1 SET_PARAMETER dcm_clk_feedback 1X SET_PARAMETER pll_bandwidth OPTIMIZED SET_PARAMETER clkin1_jitter_ps 100.0 SET_PARAMETER dcm_clk_out4_port CLK0 SET_PARAMETER clkout1_drives BUFG SET_PARAMETER num_out_clks 2 SET_PARAMETER mmcm_clkout0_divide_f 13.000 SET_PARAMETER calc_done DONE SET_PARAMETER clkout7_drives BUFG SET_PARAMETER clkout2_used true SET_PARAMETER dcm_clk_out5_port CLK0 SET_PARAMETER clkout6_requested_out_freq 100.000 SET_PARAMETER mmcm_clkout2_divide 1 SET_PARAMETER mmcm_notes None SET_PARAMETER clkout2_requested_duty_cycle 50.000 SET_PARAMETER mmcm_clkout2_use_fine_ps false SET_PARAMETER clkout6_requested_phase 0.000 SET_PARAMETER clkout3_used false SET_PARAMETER dcm_clk_out6_port CLK0 SET_PARAMETER clk_out5_use_fine_ps_gui false SET_PARAMETER clk_out1_port CLK_OUT1 SET_PARAMETER psclk_port PSCLK SET_PARAMETER dcm_pll_cascade NONE SET_PARAMETER dclk_port DCLK SET_PARAMETER mmcm_clkout5_duty_cycle 0.500 SET_PARAMETER mmcm_clkout2_phase 0.000 SET_PARAMETER pll_compensation SYSTEM_SYNCHRONOUS SET_PARAMETER clkout4_used false SET_PARAMETER clkfb_in_n_port CLKFB_IN_N SET_PARAMETER clk_out2_port CLK_OUT2 SET_PARAMETER clkout2_requested_phase 0.000 SET_PARAMETER use_locked true SET_PARAMETER den_port DEN SET_PARAMETER clk_out1_use_fine_ps_gui false SET_PARAMETER in_freq_units Units_MHz SET_PARAMETER clkout5_used false SET_PARAMETER jitter_options UI SET_PARAMETER clock_mgr_type MANUAL SET_PARAMETER pll_clkout3_duty_cycle 0.500 SET_PARAMETER clk_out3_port CLK_OUT3 SET_PARAMETER mmcm_clkfbout_phase 0.000 SET_PARAMETER pll_clkout4_phase 0.000 SET_PARAMETER clkout5_requested_out_freq 100.000 SET_PARAMETER clkout3_requested_duty_cycle 50.000 SET_PARAMETER mmcm_startup_wait false SET_PARAMETER pll_clkout5_divide 1 SET_PARAMETER clkout6_used false SET_PARAMETER clkfb_in_p_port CLKFB_IN_P SET_PARAMETER dcm_deskew_adjust SYSTEM_SYNCHRONOUS SET_PARAMETER dcm_clkfx_multiply 4 SET_PARAMETER clk_out4_port CLK_OUT4 SET_PARAMETER dcm_clkdv_divide 2.0 SET_PARAMETER clkout6_drives BUFG SET_PARAMETER clkout7_used false SET_PARAMETER mmcm_clkout1_use_fine_ps true SET_PARAMETER use_inclk_stopped false SET_PARAMETER dcm_clkfx_divide 1 SET_PARAMETER clk_out5_port CLK_OUT5 SET_PARAMETER dcm_clkin_period 10.000 SET_PARAMETER mmcm_clkout1_divide 13 SET_PARAMETER pll_clk_feedback CLKFBOUT SET_PARAMETER mmcm_clkout0_duty_cycle 0.500 SET_PARAMETER clk_out6_port CLK_OUT6 SET_PARAMETER use_clkfb_stopped false SET_PARAMETER use_max_i_jitter false SET_PARAMETER mmcm_clkout3_phase 0.000 SET_PARAMETER use_freeze false SET_PARAMETER mmcm_clkout6_duty_cycle 0.500 SET_PARAMETER pll_notes None SET_PARAMETER clkout4_requested_out_freq 100.000 SET_PARAMETER clkout4_requested_duty_cycle 50.000 SET_PARAMETER dcm_startup_wait false SET_PARAMETER component_name launch_capture_clk SET_PARAMETER clk_out7_port CLK_OUT7 SET_PARAMETER primitive MMCM SET_PARAMETER clkout7_requested_phase 0.000 SET_PARAMETER relative_inclk REL_PRIMARY SET_PARAMETER dcm_clkout_phase_shift NONE SET_PARAMETER pll_clkout4_duty_cycle 0.500 SET_PARAMETER dcm_clkin_divide_by_2 false SET_PARAMETER clk_out6_use_fine_ps_gui false SET_PARAMETER mmcm_clkfbout_mult_f 39.000 SET_PARAMETER pll_clkout5_phase 0.000 SET_PARAMETER pll_ref_jitter 0.010 SET_PARAMETER pll_clkout4_divide 1 SET_PARAMETER mmcm_clkout0_use_fine_ps false SET_PARAMETER use_clk_valid false SET_PARAMETER clkout3_requested_phase 0.000 SET_PARAMETER clk_out2_use_fine_ps_gui true SET_PARAMETER clkout5_drives BUFG SET_PARAMETER in_jitter_units Units_UI SET_PARAMETER status_port STATUS SET_PARAMETER clkout5_requested_duty_cycle 50.000 SET_PARAMETER dcm_clkgen_spread_spectrum NONE SET_PARAMETER secondary_in_freq 100.000 SET_PARAMETER clkin1_ui_jitter 0.010 SET_PARAMETER clkout3_requested_out_freq 100.000 SET_PARAMETER use_dyn_reconfig false SET_PARAMETER platform lin64 SET_PARAMETER dcm_clkgen_notes None SET_PARAMETER mmcm_clkout6_divide 1 SET_PARAMETER mmcm_clkout1_duty_cycle 0.500 SET_PARAMETER mmcm_clkfbout_use_fine_ps false SET_PARAMETER primtype_sel MMCM_ADV SET_PARAMETER primary_port CLK_IN1 SET_PARAMETER mmcm_clkout4_phase 0.000 SET_PARAMETER clkin2_jitter_ps 100.0 SET_PARAMETER pll_divclk_divide 1 SET_PARAMETER pll_clkin_period 10.000 SET_PARAMETER jitter_sel No_Jitter SET_PARAMETER prim_source No_buffer SET_PARAMETER use_inclk_switchover false SET_PARAMETER override_pll false SET_PARAMETER mmcm_clkin2_period 10.000 SET_PARAMETER pll_clkout0_phase 0.000 SET_PARAMETER pll_clkout5_duty_cycle 0.500 SET_PARAMETER clkout6_requested_duty_cycle 50.000 SET_PARAMETER mmcm_clkout4_cascade false SET_ERROR_CODE 2 SET_ERROR_MSG CANCEL: Customization cancelled. SET_ERROR_TEXT Finished initializing IP model.