/* $Id: xgpio.h,v 1.1.2.1 2009/11/25 07:38:16 svemula Exp $ */ /****************************************************************************** * * (c) Copyright 2002-2009 Xilinx, Inc. All rights reserved. * * This file contains confidential and proprietary information of Xilinx, Inc. * and is protected under U.S. and international copyright and other * intellectual property laws. * * DISCLAIMER * This disclaimer is not a license and does not grant any rights to the * materials distributed herewith. Except as otherwise provided in a valid * license issued to you by Xilinx, and to the maximum extent permitted by * applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL * FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, * IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF * MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; * and (2) Xilinx shall not be liable (whether in contract or tort, including * negligence, or under any other theory of liability) for any loss or damage * of any kind or nature related to, arising under or in connection with these * materials, including for any direct, or any indirect, special, incidental, * or consequential loss or damage (including loss of data, profits, goodwill, * or any type of loss or damage suffered as a result of any action brought by * a third party) even if such damage or loss was reasonably foreseeable or * Xilinx had been advised of the possibility of the same. * * CRITICAL APPLICATIONS * Xilinx products are not designed or intended to be fail-safe, or for use in * any application requiring fail-safe performance, such as life-support or * safety devices or systems, Class III medical devices, nuclear facilities, * applications related to the deployment of airbags, or any other applications * that could lead to death, personal injury, or severe property or * environmental damage (individually and collectively, "Critical * Applications"). Customer assumes the sole risk and liability of any use of * Xilinx products in Critical Applications, subject only to applicable laws * and regulations governing limitations on product liability. * * THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE * AT ALL TIMES. * ******************************************************************************/ /*****************************************************************************/ /** * @file xgpio.h * * This file contains the software API definition of the Xilinx General Purpose * I/O (XGpio) device driver. * * The Xilinx GPIO controller is a soft IP core designed for Xilinx FPGAs and * contains the following general features: * - Support for up to 32 I/O discretes for each channel (64 bits total). * - Each of the discretes can be configured for input or output. * - Configurable support for dual channels and interrupt generation. * * The driver provides interrupt management functions. Implementation of * interrupt handlers is left to the user. Refer to the provided interrupt * example in the examples directory for details. * * This driver is intended to be RTOS and processor independent. Any needs for * dynamic memory management, threads or thread mutual exclusion, virtual * memory, or cache control must be satisfied by the layer above this driver. * * Initialization & Configuration * * The XGpio_Config structure is used by the driver to configure itself. This * configuration structure is typically created by the tool-chain based on HW * build properties. * * To support multiple runtime loading and initialization strategies employed * by various operating systems, the driver instance can be initialized in one * of the following ways: * * - XGpio_Initialize(InstancePtr, DeviceId) - The driver looks up its own * configuration structure created by the tool-chain based on an ID provided * by the tool-chain. * * - XGpio_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr) - Uses a * configuration structure provided by the caller. If running in a system * with address translation, the provided virtual memory base address * replaces the physical address present in the configuration structure. * * @note * * This API utilizes 32 bit I/O to the GPIO registers. With less than 32 bits, * the unused bits from registers are read as zero and written as don't cares. * *
* MODIFICATION HISTORY:
*
* Ver   Who  Date     Changes
* ----- ---- -------- -----------------------------------------------
* 1.00a rmm  03/13/02 First release
* 2.00a jhl  11/26/03 Added support for dual channels and interrupts
* 2.01a jvb  12/14/05 I separated dependency on the static config table and
*                     xparameters.h from the driver initialization by moving
*                     _Initialize and _LookupConfig to _sinit.c. I also added
*                     the new _CfgInitialize routine.
* 2.11a mta  03/21/07 Updated to new coding style, added GetDataDirection
* 2.12a sv   11/21/07 Updated driver to support access through DCR bus
* 2.12a sv   06/05/08 Updated driver to fix the XGpio_InterruptDisable function
*		      to properly update the Interrupt Enable register
* 2.13a sdm  08/22/08 Removed support for static interrupt handlers from the MDD
*		      file
* 3.00a sv   11/21/09 Updated to use HAL Processor APIs.
*		      Renamed the macros XGpio_mWriteReg to XGpio_WriteReg and
*		      XGpio_mReadReg to XGpio_ReadReg. Removed the macros
*		      XGpio_mSetDataDirection, XGpio_mGetDataReg and
*		      XGpio_mSetDataReg. Users should use XGpio_WriteReg and
*		      XGpio_ReadReg to achieve the same functionality.
* 
*****************************************************************************/ #ifndef XGPIO_H /* prevent circular inclusions */ #define XGPIO_H /* by using protection macros */ #ifdef __cplusplus extern "C" { #endif /***************************** Include Files ********************************/ #include "xil_types.h" #include "xil_assert.h" #include "xstatus.h" #include "xgpio_l.h" /************************** Constant Definitions ****************************/ /**************************** Type Definitions ******************************/ /** * This typedef contains configuration information for the device. */ typedef struct { u16 DeviceId; /* Unique ID of device */ u32 BaseAddress; /* Device base address */ int InterruptPresent; /* Are interrupts supported in h/w */ int IsDual; /* Are 2 channels supported in h/w */ } XGpio_Config; /** * The XGpio driver instance data. The user is required to allocate a * variable of this type for every GPIO device in the system. A pointer * to a variable of this type is then passed to the driver API functions. */ typedef struct { u32 BaseAddress; /* Device base address */ u32 IsReady; /* Device is initialized and ready */ int InterruptPresent; /* Are interrupts supported in h/w */ int IsDual; /* Are 2 channels supported in h/w */ } XGpio; /***************** Macros (Inline Functions) Definitions ********************/ /************************** Function Prototypes *****************************/ /* * Initialization functions in xgpio_sinit.c */ int XGpio_Initialize(XGpio *InstancePtr, u16 DeviceId); XGpio_Config *XGpio_LookupConfig(u16 DeviceId); /* * API Basic functions implemented in xgpio.c */ int XGpio_CfgInitialize(XGpio *InstancePtr, XGpio_Config * Config, u32 EffectiveAddr); void XGpio_SetDataDirection(XGpio *InstancePtr, unsigned Channel, u32 DirectionMask); u32 XGpio_GetDataDirection(XGpio *InstancePtr, unsigned Channel); u32 XGpio_DiscreteRead(XGpio *InstancePtr, unsigned Channel); void XGpio_DiscreteWrite(XGpio *InstancePtr, unsigned Channel, u32 Mask); /* * API Functions implemented in xgpio_extra.c */ void XGpio_DiscreteSet(XGpio *InstancePtr, unsigned Channel, u32 Mask); void XGpio_DiscreteClear(XGpio *InstancePtr, unsigned Channel, u32 Mask); /* * API Functions implemented in xgpio_selftest.c */ int XGpio_SelfTest(XGpio *InstancePtr); /* * API Functions implemented in xgpio_intr.c */ void XGpio_InterruptGlobalEnable(XGpio *InstancePtr); void XGpio_InterruptGlobalDisable(XGpio *InstancePtr); void XGpio_InterruptEnable(XGpio *InstancePtr, u32 Mask); void XGpio_InterruptDisable(XGpio *InstancePtr, u32 Mask); void XGpio_InterruptClear(XGpio *InstancePtr, u32 Mask); u32 XGpio_InterruptGetEnabled(XGpio *InstancePtr); u32 XGpio_InterruptGetStatus(XGpio *InstancePtr); #ifdef __cplusplus } #endif #endif /* end of protection macro */