MINIUART Project Status
Project File: miniuart.ise Current State: Programming File Generated
Module Name: top_level_file
  • Errors:
No Errors
Target Device: xc2vp30-7ff896
  • Warnings:
147 Warnings
Product Version: ISE 9.1.03i
  • Updated:
Sun Dec 9 22:34:21 2007
 
MINIUART Partition Summary
No partition information was found.
 
Device Utilization Summary
Logic UtilizationUsedAvailableUtilizationNote(s)
Number of Slice Flip Flops 446 27,392 1%  
Number of 4 input LUTs 1,759 27,392 6%  
Logic Distribution     
Number of occupied Slices 1,061 13,696 7%  
Number of Slices containing only related logic 1,061 1,061 100%  
Number of Slices containing unrelated logic 0 1,061 0%  
Total Number of 4 input LUTs 1,870 27,392 6%  
Number used as logic 1,759      
Number used as a route-thru 110      
Number used as Shift registers 1      
Number of bonded IOBs 14 556 2%  
    IOB Flip Flops 3      
Number of PPC405s 0 2 0%  
Number of Block RAMs 117 136 86%  
Number of GCLKs 6 16 37%  
Number of DCMs 2 8 25%  
Number of GTs 0 8 0%  
Number of GT10s 0 0 0%  
Total equivalent gate count for design 7,698,208      
Additional JTAG gate count for IOBs 672      
 
Performance Summary
Final Timing Score: 0 Pinout Data: Pinout Report
Routing Results: All Signals Completely Routed Clock Data: Clock Report
Timing Constraints: All Constraints Met    
 
Detailed Reports
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis ReportCurrentSun Dec 9 22:32:52 20070146 Warnings20 Infos
Translation ReportCurrentSun Dec 9 22:33:00 2007000
Map ReportCurrentSun Dec 9 22:33:11 2007006 Infos
Place and Route ReportCurrentSun Dec 9 22:33:43 200701 Warning0
Static Timing ReportCurrentSun Dec 9 22:33:48 2007002 Infos
Bitgen ReportCurrentSun Dec 9 22:34:20 2007002 Infos