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Control is the hard part of design.
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The regularity found in arithmetic and memory structures usually not present in control structures.
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Finite-State machines provide an organized structure for capturing control sequencing and operation.
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Two types of state machines:
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State transition diagrams used to represent state machines.
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Toll-booth controller example:
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Write the state equations of the form:
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if (state == oldstate & condition) next-state = newstate.
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Rules for assigning state bits and output encoding method given in Weste and Eshraghian.
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Control logic in CMOS is constructed in two main ways:
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Two-level sum-of-products
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Multilevel logic
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Two-level sum-of-products:
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PLA implementation:
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Regular structure for implementing combinational and sequential logic functions.
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We have examined how to construct combinational functions already.
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Sequential functions (finite-state machines) implementations are identical except that outputs are fed back to the inputs via registers.
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Pseudo n-MOS implementation main disadvantage is static power dissipation.
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Dynamic CMOS implementation involves suppling the AND plane and OR plane with clocks (see Weste and Eshraghian).
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Multilevel Logic:
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Most commonly used method for implementing control logic in CMOS.
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Cascaded groups of regular gates such as INVERTERS, BUFFERS, NANDs, NORs, XORs and AOIs.
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CAD systems are highly effective at automatically minimizing the logic, making state assignments and synthesizing layouts as gate-arrays or standard-cell layouts.
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