-
The design process must be understood in order to enhance design testability.
-
Appending a DFT structure to the design at it completion may compromise the design goals.
-
Design Synthesis
-
Mapping one design description to another
closer to the physical layer
.
-
Optimizing the design to suit the technology.
-
CAD tools, however, go beyond synthesis, e.g.,
-
Simulation
-
TPG
-
DRC
-
Parameter extraction
-
Synthesis is difficult because of
design constraints
and
alternatives
.
-
Different tasks performed on the design.
-
Here, Synthesis is defined as translation from
Behavioral
to
Structural
.
-
RTL and Logic synthesis are examples.
-
However, Generation is also synthesis (physical synthesis) of the masks:
-
Synthesis based on
std cell
occupies the inner most layer of abstraction.
-
Core-based
synthesis would be at the outer most layer.
-
Behavioral Synthesis shortens design cycle (and time-to-market) and allows
design space
to be explored.
-
Power and testability added to traditional area and performance metrics.
-
Behavioral synthesis (to RTL) consists of three main parts:
-
Compilation
-
Scheduling
-
Allocations
-
RTL optimization to improve area.
-
Logic synthesis:
-
Behavior synthesis produces an RTL module, that incorporates architectural elements such as registers, multiplexers and functional units.
-
Some modules are part of a library, others need synthesized into logic.
-
Two stages of logic synthesis
-
Tech. independent
-
Tech. dependent (technology mapping).
-
The latter involves binding to library components, some of which are designed to facilitate testing, e.g.,
-
Flip-flops with
scan
or for use in
LFSR
s for
BIST
.
-
Two main categories:
-
Full custom and semi-custom:
-
Custom: maximizes
design flexibility
and
performance
.
-
High development costs and time -- suitable only for large volume products such as memory and microprocessors.
-
Semi-custom facilitated by having CAD tools use libraries of
pre-designed
components (and sometimes
pre-fabricated
chips: PLA and FPGAs).
-
Automation
restricts
designers but
enhances
design time.
-
Classification of methodologies:
-
Trend is toward reuse of already designed and tested cells.
-
Called
cores
or
intellectual properties
(
IP
s).
-
The classification of semi-custom design is based on the size and complexity of the library components.
-
Cells are small gates, e.g., NANDs and NORs.
-
Blocks are ALUs and multipliers.
-
Cores are microprocessors and RAMs.
-
Cores come in three types:
-
Soft
: A HDL description -- very flexible.
-
Firm
: mapped to a library.
-
Hard
: Layout description -- cannot be changed.
-
Mask programmable types:
Type
|
AND plane
|
OR plane
|
Remark
|
PROM
|
Fixed
|
Program
|
E(E)PROM
|
PLA
|
Program
|
Program
|
|
PLD
|
Program
|
Fixed
|
|
-
Unique failure modes are possible for the programmable devices, to be discussed.
-
See text for other design details on MPGAs and FPGAs.
-
Involves floor
planning
,
P&R
and
parameter extraction
.
-
P&R algorithms discussed in the text.
-
Placement
needs to consider scan-path connectivity during synthesis.
-
Routing
needs to be consider
signal integrity issues
(e.g.,
crosstalk
) in addition to
minimal distance
and
number of via
heuristics.
-
Back-annotation
refers to extracting info from the circuit layout.
-
Timing info feed back to synthesis stages for possible resynthesis.
-
CAD tools used for parameter extraction called
Technology CAD
.