-
What advantages do ICs have over discrete components?
-
Size:
Sub-micron vs. millimeter/centimeter.
-
Speed
and
Power
: Smaller size of IC components yields
higher speed
and
lower power
consumption due to smaller parasitic resistances, capacitances and inductances.
-
Switching between `0' and `1' much faster on chip than between chips.
-
Payoff at the system level:
-
Systems are physically smaller, e.g. cell phones.
-
Lower power consumption ripple effect => less heat => cheaper power supplies => reduced system cost.
-
Integrated circuit manufacturing is
versatile.
-
Simply change the mask to change the design.
-
However, designing the layout (changing the masks) is usually the most time consuming task in IC design.
-
A Sample of Integrated Circuit technologies:
-
Bipolar
-
Transistor-transistor logic (TTL)
-
I
ntegrated Injection Logic (I
2
L)
-
Gallium Arsenide (GaAs)
-
Silicon Germanium
-
BiCMOS
-
Superconducting technologies
-
Trade-offs among a few of the choices:
-
Changing the value of a physical variable requires more power as you change it more quickly.
-
Power consumption (heat) of bipolar circuits reduce level of integration.
-
Reducing chip size increases physical size of the system.
-
Multiple ICs offset advantage of faster speed of bipolar since intra-chip signal propagation is much smaller than inter-chip propagation.
-
On-chip wires suffer capacitance and resistance. However, off-chip wires suffer from capacitance and inductance (ringing effects).
-
CMOS advantages:
-
Low power.
-
Fully restored logic levels.
-
Rise and fall transition times are of the same order.
-
Very high levels of integration.
-
High performance.
-
Technology generation defined by:
-
Feature size: Size of the smallest features on an IC, usually the length of the transistor channel.
-
Current feature size:
180 nm
.
-
What are the leading obstacles in reducing feature size?
-
Photolithographic tools:
-
Current optical techniques:
248 nm
wavelength good to
180 nm
.
-
Next (and probably last) generation of optical lithography:
193 nm
wavelength can reduce feature size to 130 nm, possibly down to 100 nm.
-
Contending solutions for 100 nm and below (
Spectrum
, "Solid state", Jan. 1998):
-
X-ray, extreme ultraviolet, projection electron-beam and ion projection.
-
Moore's Law (
Intel Chairman, 1965, Gordon Moore)
:
-
# of transistors in IC will double every 18 months.
Technology Roadmap for Semiconductors
|
|
1997
(250 nm)
|
1999
(180 nm)
|
2002
(130 nm)
|
2005
(100 nm)
|
2008
(70 nm)
|
2011
(50 nm)
|
|
DRAM (bits)
|
256M
|
1G
|
4G
|
16G
|
64G
|
256G
|
|
MPU transistors/cm
2
|
3.7M
|
6.2M
|
18M
|
39M
|
84M
|
180M
|
|
DRAM chip size (mm
2
)
|
280
|
400
|
560
|
790
|
1120
|
1580
|
|
MPU chip size (mm
2
)
|
300
|
340(3.4cm
2
)
|
430
|
520
|
620
|
750
|
-
MPU growth is a little slower:
-
Number of transistors: 2-3X every three years (DRAM about 4X%).
-
Die size: 20% every three years (DRAM about 40%)
.
-
Example: 6.2 million * 3.4 cm
2
= 21.1 million transistors.
-
Accurate for last 30 years.
-
Will it hold for the next 15 years? Will it fail due to physics or economics?
-
Lithographic limits, design and test complexity and/or fabrication costs.
-
Moore's Law:
-
Minimum transistor feature size must decrease by a factor of 0.7 every three years:
-
Moore's Second Law:
-
The cost of building a semiconductor fab is doubling every three to four years.
-
In 1995, approximately 50 fabs in operation all over the world.
-
Another 50 in some state of completion.
-
Current cost > $1 billion
-
Toshiba predicts cost of building mega-fabs may slowdown Moore's first law.
-
Companies joining forces.
-
IBM/Siemens(64Mbit technology)
-
IBM/Siemens/Toshiba(256Mbit)
-
Pentium III Processor Characteristics:
-
Speed: 1GHz
-
Number of transistors: ~30 million
-
Supply voltage: <=2.0 system
-
Technology: 180 nm
-
Peak Power: ~35 Watts
-
System bus speed: 125 MHz
-
Other examples available on the web from:
-
HP (Vectra)
-
DEC (Alpha)
-
IBM (PowerPC)
-
Sun (SPARC)
-
SGI
-
Apple
-
Motorola
