ECE 522: Hardware/Sofware Codesign with FPGAs

Instructor: Jim Plusquellic
Department of ECE, UNM

* Course Syllabus

* Course Overview (video)

* Introduction I
* Introduction I(A) (video)
* Introduction I(B) (video)
* Introduction I(C) (video)
* Introduction II
* Introduction II(A) (video)
* Introduction II(B) (video)
* Introduction II(C) (video)
* Introduction II(D) (video)
* Introduction III
* Introduction III(A) (video)
* Introduction III(B) (video)
* Introduction III(C) (video)
* DataFlow Model I
* DataFlow Model I(A) (video)
* DataFlow Model I(B) (video)
* DataFlow Model II
* DataFlow Model II(A) (video)
* DataFlow Model II(B) (video)
* DataFlow Model III
* DataFlow Model III(A) (video)
* DataFlow Model III(B) (video)
* DataFlow Model III(C) (video)
* DataFlow Software Implementation I
* DataFlow Software Implementation I(A) (video)
* DataFlow Software Implementation I(B) (video)
* DataFlow Software Implementation II
* DataFlow Software Implementation II(A) (video)
* DataFlow Software Implementation II(B) (video)
* DataFlow Hardware Implementation
* DataFlow Hardware Implementation (video)
* Analysis of Control Flow and Data Flow I
* Analysis of Control Flow and Data Flow I(A) (video)
* Analysis of Control Flow and Data Flow I(B) (video)
* Analysis of Control Flow and Data Flow I(C) (video)
* Analysis of Control Flow and Data Flow II
* Analysis of Control Flow and Data Flow II(A) (video)
* Analysis of Control Flow and Data Flow II(B) (video)
* Analysis of Control Flow and Data Flow II(C) (video)
* Microprogramming I
* Microprogramming II
* Microprogramming III
* Embedded Cores I
* Embedded Cores II

Supplementary Material:

* Linux Device Drivers I
* Linux Device Drivers II

Announcements:

*

FPGA Links:

* Digilent ZYBO Academic Website (Setup an account with Digilent to get academic discount below $189 list)
* Supplemental Vivado tutorials
* Zynq SoC Overview
* Digilent ZYBO FPGA board Reference Manual

Xilinx Vivado documentation:

* Vivado documentation and tutorials

Laboratory Supplemental Lectures:

* VHDL Essentials I
* VHDL Essentials I(A) (video)
* VHDL Essentials I(B) (video)
* VHDL Essentials I(C) (video)
* VHDL Essentials II
* VHDL Essentials II(A) (video)
* VHDL Essentials II(B) (video)
* VHDL Essentials III
* VHDL Essentials III(A) (video)
* VHDL Essentials III(B) (video)
* VHDL Essentials III(C) (video)
* VHDL Essentials IV
* VHDL Essentials IV(A) (video)
* VHDL Essentials IV(B) (video)
* VHDL Essentials IV(C) (video)
* VHDL Essentials IV(D) (video)
* VHDL Essentials V
* VHDL Essentials V(A) (video)
* VHDL Essentials V(B) (video)
* VHDL Essentials V(C) (video)
* VHDL Essentials V(D) (video)

Laboratory Lectures:

* ZYBO Z7-10 Boot Instructions
* ZYBO Z7-10 Master XDC file
* ZYBO Z7-10 Boot Files
* ZYBO Z7-10 Board Files (Add these files to (Xilinx_install_dir)/Vivado/2017.2/data/boards/board_files/zybo-z7-10/A.0/ directory)
* Ivan Bow's tutorial on how to run linux on a Window's 10 machine

* Vivado: Installation, Part A (video)
* Vivado: Installation, Part B (video)
* Vivado: Create Project, Part A (video)
* Vivado: Create Project, Part B (video)
* Vivado: Synthesis, Part A (video)
* Vivado: Synthesis, Part B (video)
* Vivado: Program FPGA (video)
* Vivado: Hardware Demo: Even Detector (video)
* Even Detector (VHDL files)

* Vivado: SoC Programming Concepts (video)
* Vivado: Block Diagram Tool, Part A (video)
* Vivado: Block Diagram Tool, Part B (video)
* Vivado: Adding Custom VHDL to the Block Diagram, Part A (video)
* Vivado: Adding Custom VHDL to the Block Diagram, Part B (video)
* Vivado: Adding Custom VHDL to the Block Diagram, Part C (video)
* FSM I
* FSM I(A) (video)
* FSM I(B) (video)
* FSM I(C) (video)
* FSM I(D) (video)
* FSM II
* FSM II(A) (video)
* FSM II(B) (video)
* FSM II(C) (video)
* Vivado: SDK I(A), Create Application (video)
* Vivado: SDK I(B), Create Application (video)
* Vivado: SDK II(A), GPIO BRAM C Code (video)
* Vivado: SDK II(B), GPIO BRAM Hardware Demo (video)
* FSM: Secure Memory Access Controller (VHDL and C Files)

* FSMD I
* FSMD I(A), Concepts (video)
* FSMD I(B), C code (video)
* FSMD I(C), ASMD (video)
* FSMD I(D), VHDL (video)
* FSMD I(E), VHDL (video)
* FSMD: HISTO Project Creation and Hardware Demo, Part A (video)
* FSMD: HISTO Project Creation and Hardware Demo, Part B (video)
* FSMD: HISTO (VHDL and C Files)

* Vivado HLS LFSR_11Bit, Part A (video)
* Vivado HLS LFSR_11Bit, Part B (video)
* Vivado HLS (C Files)

Laboratories:

* Lab 0: Install Vivado (PDF)
* Lab 0: Create Project (PDF)
* Lab 0: Synthesis (PDF)
* Lab 0: Hardware Demo Even Detector (PDF)
* Lab 0: Create Block Diagram (PDF)
* Lab 0: Design 1 Wrapper (PDF)
* Lab 0: SDK (PDF)
* Lab 0: Hardware Demo GPIO BRAM (PDF)
* Lab 0: HISTO ASMD (PDF)
* Lab 0: Hardware Demo HISTO (PDF)
* Lab 1 Description (PDF)
* Lab 2 Description (PDF)
* Laboratory grading criteria

Project:

* Project Description (PDF)
* K-Means (C Files)
* DataSets (test cases)
* Wikipedia K-means clustering algorithm
* 2-D Data Sets
Jim Plusquellic / ECE /